diff --git a/drivers/gpu/drm/amd/ras/core/core.c b/drivers/gpu/drm/amd/ras/core/core.c index b2b2b20a04a3..7bf5814214df 100644 --- a/drivers/gpu/drm/amd/ras/core/core.c +++ b/drivers/gpu/drm/amd/ras/core/core.c @@ -734,6 +734,41 @@ int ras_core_check_address_sanity(struct ras_core_context *ras_core, return 0; } +int ras_core_get_ip_version(struct ras_core_context *ras_core, + enum ras_unit_id unit_id, uint32_t *version) +{ + if (!version) + return -EINVAL; + + switch (unit_id) { + case RAS_UNIT_ID_UMC: + *version = ras_core->ras_umc.umc_ip_version; + return 0; + case RAS_UNIT_ID_GFX: + *version = ras_core->ras_gfx.gfx_ip_version; + return 0; + case RAS_UNIT_ID_MP1: + *version = ras_core->ras_mp1.mp1_ip_version; + return 0; + case RAS_UNIT_ID_PSP: + *version = ras_core->ras_psp.psp_ip_version; + return 0; + case RAS_UNIT_ID_NBIO: + *version = ras_core->ras_nbio.nbio_ip_version; + return 0; + case RAS_UNIT_ID_ACA: + *version = ras_core->ras_aca.aca_ip_version; + return 0; + case RAS_UNIT_ID_EEPROM: + *version = ras_core->ras_eeprom.tbl_hdr.version; + return 0; + default: + break; + } + + return -RAS_CORE_NOT_SUPPORTED; +} + int ras_core_get_eeprom_version(struct ras_core_context *ras_core, uint32_t *version) { diff --git a/drivers/gpu/drm/amd/ras/core/ras.h b/drivers/gpu/drm/amd/ras/core/ras.h index fca53a3ebefd..54ad8495c27f 100644 --- a/drivers/gpu/drm/amd/ras/core/ras.h +++ b/drivers/gpu/drm/amd/ras/core/ras.h @@ -151,6 +151,17 @@ enum ras_fw_eeprom_cmd { RAS_SMU_GetBadPageMcaAddr, }; +enum ras_unit_id { + RAS_UNIT_ID_UMC, + RAS_UNIT_ID_GFX, + RAS_UNIT_ID_MP1, + RAS_UNIT_ID_PSP, + RAS_UNIT_ID_NBIO, + RAS_UNIT_ID_ACA, + RAS_UNIT_ID_EEPROM, + RAS_UNIT_ID_MAX +}; + struct ras_core_context; struct ras_bank_ecc; struct ras_umc; @@ -416,4 +427,6 @@ int ras_core_set_debug_mode(struct ras_core_context *ras_core, bool enable); bool ras_core_is_ce_log_disabled(struct ras_core_context *ras_core); int ras_core_get_eeprom_version(struct ras_core_context *ras_core, uint32_t *version); +int ras_core_get_ip_version(struct ras_core_context *ras_core, + enum ras_unit_id unit_id, uint32_t *version); #endif