spi/pxa2xx: Add chipselect support for Sodaville

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The SPI core on Sodaville supports chip selects. Its configuration
moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked
up with up to 4 devices.
This patch ensures that the bits which are otherwiese reserved are only
touched on Sodaville and not on any other PXAs. Also it makes sure that
the status register does not lose the CS information while clearing the
ROR bit.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>

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Sebastian Andrzej Siewior 2010-11-22 17:12:17 -08:00

parent d0777f2c3e

commit 2a8626a9e2

2 changed files with 70 additions and 25 deletions

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93

drivers/spi/pxa2xx_spi.c

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2

include/linux/pxa2xx_ssp.h

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