drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled

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MP1 cannot access clock IP during MP1 FW reload, disable PLL
shutdown as a workaround.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Jack Xiao 2019-05-06 16:28:22 +08:00 • committed by Alex Deucher

parent 8c3b2d1bc0

commit 2a8bfa139a

1 changed files with 5 additions and 1 deletions

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6

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

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