drm/nv50: use "nv86" tlb flush method on everything except 0x50/0xac

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It has been reported that this greatly improves (and possibly fixes
completely) the stability of NVA3+ chipsets.  In traces of my NVA8,
NVIDIA now appear to be doing this too.

The most recent traces of 0x50 and 0xac I could find don't show NVIDIA
checking PGRAPH status on these flushes, so for now, we won't either.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

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This commit is contained in:

Ben Skeggs 2011-03-29 09:56:14 +10:00

parent c0929b499f

commit 2b4cebe4e1

3 changed files with 6 additions and 10 deletions

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2

drivers/gpu/drm/nouveau/nouveau_drv.h

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12

drivers/gpu/drm/nouveau/nouveau_state.c

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2

drivers/gpu/drm/nouveau/nv50_graph.c

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