clk: sunxi-ng: mux: Add support for mux tables

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Some clock muxes have holes, i.e. invalid or unconnected inputs,
between parent mux values.

Add support for specifying a mux table to map clock parents to
mux values.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Chen-Yu Tsai 2016-08-25 14:21:56 +08:00 • committed by Maxime Ripard

parent 89af85253c

commit 2b9c875c56

2 changed files with 23 additions and 6 deletions

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12

drivers/clk/sunxi-ng/ccu_mux.c

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17

drivers/clk/sunxi-ng/ccu_mux.h

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