drm/amdgpu/gfx10: update CGTS_TCC_DISABLE and CGTS_USER_TCC_DISABLE register offsets for VGH

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For Vangogh:
The offset of the CGTS_TCC_DISABLE is 0x5006 by calculation.
The offset of the CGTS_USER_TCC_DISABLE is 0x5007 by calculation.

Signed-off-by: chen gong <curry.gong@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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chen gong 2021-01-29 15:37:45 +08:00 • committed by Alex Deucher

parent e1a4b67aac

commit 2cb96b2387

1 changed files with 16 additions and 2 deletions

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drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

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