dt-bindings: phy: Document PCIe PHY in EcoNet EN751221 and EN7528

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EN751221 and EN7528 SoCs have two PCIe slots, and each one has a PHY
which behaves slightly differently because one slot is Gen1/Gen2 while
the other is Gen1 only.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260425173642.406089-2-cjd@cjdns.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>

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Caleb James DeLisle 2026-04-25 17:36:41 +00:00 • committed by Vinod Koul

parent 864b3617df

commit 2cc066dbd3

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Documentation/devicetree/bindings/phy/econet,en751221-pcie-phy.yaml

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MAINTAINERS

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