drm/i915/bw: Do not consider tile4 as tileY

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For the purposes of memory bandwidth calculations tile4
should not be considered the same as tileY. Make it so.

This should not actually change anything as the affected
code only applies to pre-MTL integrated GPUs, which don't
have tile4.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260522200346.17377-11-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

...

This commit is contained in:

Ville Syrjälä 2026-05-22 23:03:46 +03:00

parent 1d36507381

commit 2cd48d05fb

1 changed files with 16 additions and 13 deletions

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drivers/gpu/drm/i915/display/intel_bw.c

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