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arm64: dts: fsl-ls1028a: Drop CPU masks from GICv3 PPI interrupts
Unlike older GIC variants, the GICv3 DT bindings do not support specifying a CPU mask in PPI interrupt specifiers. Drop the masks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Frank Li <Frank.Li@nxp.com>
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