drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor

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Make the pclk_rate u64 to accommodate higher pixel clock
rates.

Changes in v3:
- Converted pclk_rate to u32 (Archit)
- Rebase on dsi cleanup set in msm-next

Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

...

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Abhinav Kumar 2018-06-07 13:50:29 -07:00 • committed by Sean Paul

parent bb676df12b

commit 2d0b10fc51

1 changed files with 5 additions and 2 deletions

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7

drivers/gpu/drm/msm/dsi/dsi_host.c

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