clk: sunxi-ng: Add check for minimal rate to NM PLLs

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Some NM PLLs doesn't work well when their output clock rate is set below
certain rate.

Add support for that constrain.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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Jernej Skrabec 2018-03-01 22:34:27 +01:00 • committed by Maxime Ripard

parent a5ebc3368e

commit 2d2b61c13a

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GPG key ID: D2B4C094214DAF74

2 changed files with 34 additions and 0 deletions

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7

drivers/clk/sunxi-ng/ccu_nm.c

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27

drivers/clk/sunxi-ng/ccu_nm.h

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