drm/amdgpu: fix master_xcc_ids[] indexing for non-zero xcc_id

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add_hw_queue, remove_hw_queue, set_hw_resources_1 and inv_tlbs_pasid
read master_xcc_ids[MES_PIPE_INST(xcc_id, SCHED)]. That only worked
for xcc_id == 0; with a non-zero target (e.g. partition-1 master in
DPX) it read an uninitialised slot. Index by xcc_id consistently, and
fix the related shared_cmd_buf_gpu_addr[] index in
set_hw_resources_1() to use MES_PIPE_INST(master_xcc_id, pipe).
All indexing stays in logical XCC space, so this remains correct with
harvested XCCs; the existing ip_map / GET_INST() translation handles
the logical-to-physical conversion at the HW register boundary.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Alex Sierra 2026-06-05 15:58:30 -05:00 • committed by Alex Deucher

parent 5e23e92af2

commit 2d9a33154a

1 changed files with 8 additions and 10 deletions

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drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

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