arm64: dts: renesas: r8a779f0: Add secondary CA55 CPU cores

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Complete the description of the Cortex-A55 CPU cores and L3 cache
controllers on the Renesas R-Car S4-8 (R8A779F0) SoC, including CPU
topology and PSCI support for enabling CPU cores.

R-Car S4-8 has 8 Cortex-A55 cores, grouped in 4 clusters.

Based on patches in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/d6af5975090d5830cb053b52400439bd1cbe8fc7.1654701480.git.geert+renesas@glider.be

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Geert Uytterhoeven 2022-06-08 17:40:20 +02:00

parent ffeca49a8b

commit 2dcb78d226

1 changed files with 133 additions and 5 deletions

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arch/arm64/boot/dts/renesas/r8a779f0.dtsi

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