KVM: PPC: Book3S HV: Implement radix prefetch workaround by disabling MMU

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Rather than partition the guest PID space + flush a rogue guest PID to
work around this problem, instead fix it by always disabling the MMU when
switching in or out of guest MMU context in HV mode.

This may be a bit less efficient, but it is a lot less complicated and
allows the P9 path to trivally implement the workaround too. Newer CPUs
are not subject to this issue.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210528090752.3542186-22-npiggin@gmail.com

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Nicholas Piggin 2021-05-28 19:07:41 +10:00 • committed by Michael Ellerman

parent 41f7799176

commit 2e1ae9cd56

7 changed files with 34 additions and 118 deletions

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6

arch/powerpc/include/asm/mmu_context.h

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21

arch/powerpc/kvm/book3s_hv.c

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14

arch/powerpc/kvm/book3s_hv_p9_entry.c

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34

arch/powerpc/kvm/book3s_hv_rmhandlers.S

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27

arch/powerpc/mm/book3s64/radix_pgtable.c

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46

arch/powerpc/mm/book3s64/radix_tlb.c

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4

arch/powerpc/mm/mmu_context.c

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