drm/amdgpu: set snoop bit in pde/pte entries for A+A

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Page tables in vram mapping to cpu is changed from uncached to
cached in A+A, the snoop bit in VM_CONTEXTx_PAGE_TABLE_BASE_ADDR/
PDE0s/PDE1s/PDE2s/PTE.TFs has to be set so gpuvm walker snoop
page table data out of CPU cache.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Eric Huang 2021-02-27 17:46:44 -05:00 • committed by Alex Deucher

parent 06bfc045d5

commit 2e2f197f4c

1 changed files with 4 additions and 0 deletions

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drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

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