dmaengine: idma64: make better performance on pause / resume

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Accordingly to the documentation the CH_DRAIN bit enforses single bursts when
channel is going to be suspended. This, in case when channel will be resumed,
makes data to flow in non-optimal mode until DMA returns to full burst mode.
The fix differentiates pause / resume cycle from pause / terminate and sets
CH_DRAIN bit accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

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Andy Shevchenko 2015-09-14 11:55:40 +03:00 • committed by Vinod Koul

parent 581ec089a5

commit 2e9b55becc

1 changed files with 8 additions and 6 deletions

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drivers/dma/idma64.c

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