From 2eb0681ea7604880ade2d715e4212132c393c132 Mon Sep 17 00:00:00 2001 From: Leo Chen Date: Mon, 13 Apr 2026 15:42:35 -0400 Subject: [PATCH] drm/amd/display: Enable HUBP/OPTC/DPP power gating [Why & How] Enable driver power gating on DCN42 for HUBP OPTC and DPP HW blocks. Reviewed-by: Ovidiu Bunea Reviewed-by: Charlene Liu Signed-off-by: Leo Chen Signed-off-by: Tom Chung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- .../amd/display/dc/resource/dcn42/dcn42_resource.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c index c2f8554cdcd3..227eb1317663 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c @@ -694,9 +694,12 @@ static const struct dc_debug_options debug_defaults_drv = { .force_abm_enable = false, .clock_trace = true, .disable_pplib_clock_request = false, - .disable_dpp_power_gate = true, - .disable_hubp_power_gate = true, - .disable_optc_power_gate = true, + .ignore_pg = false, + .disable_dpp_power_gate = false, + .disable_hubp_power_gate = false, + .disable_optc_power_gate = false, + .disable_dsc_power_gate = false, + .disable_dio_power_gate = true, .pipe_split_policy = MPC_SPLIT_AVOID, .force_single_disp_pipe_split = false, .disable_dcc = DCC_ENABLE, @@ -758,12 +761,10 @@ static const struct dc_debug_options debug_defaults_drv = { .min_disp_clk_khz = 50000, .static_screen_wait_frames = 2, .disable_z10 = false, - .ignore_pg = false, .disable_stutter_for_wm_program = true, .min_deep_sleep_dcfclk_khz = 8000, .replay_skip_crtc_disabled = true, .psr_skip_crtc_disable = true, - .disable_dio_power_gate = true, }; static const struct dc_check_config config_defaults = {