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SoC fixes for omaps for v5.0-rc cycle
This series contains two SoC regression fixes and one uninitialized variable fix: - Fix inverted nirq pin handling for omap5 that started producing warnings with earlier GIC direction checks and took a while to understand and confirm. Basically there are two sys_nirq pins that are bypassing peripheral modules and inverted automatically by the SoC and need to be handled with a custom irq_set_type() - Recent ti-sysc changes caused a regression to the pwm-omap-dmtimer code where the device tree handling code for timer source clock gets confused. It looks like we can remove that code eventually, but for now we just drop a bogus pm_runtime_irq_safe() for the timers with the related quirks caused by pm_runtime_irq_safe(), and have the standard assigned-clocks and assigned-clock-parents deal with setting the source clock - Fix potentially uninitialized value for display init code if regmap_read() fails -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlxR8TERHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXNhNQ/+JfJVPT4SyF0KQz8BJYYF2bVvJyFv0kBR XrGIi6KTdoiN9Bm3Trt1rM+YJpS2Ii2YAc2frGVE4qMHw6ZUZA1uDxDl6J6C04H+ Eb7XrYnt0hqzuLfmx5ubX2eem92AgszWou85v8flwIk7dUJWtNkhUFTZtoDujLSM ZnBWcG+9MuSWGpcigu1O9Qt/ePwQerxAksE46fKlbjZrk03j/Eh3A3YCTInV7sgR Dl+jZhfva92GupcBzMsjWYaqLzdBG7Cq4pGfbhyTHdaapt26nK/osuNPh+zFgWZe ppKbyPcQQ9ph9qJWd6A/BN9uN3zQfBwwtjVWaGX0LqahsEcIQyjj6QSKMjbYdNOK fdXuL3Du6zMeQlez1mjS9xBU9s8B1N60F+vCVanDZW8ynkPZp7gBnG5vxC9ZEfR3 ZVLzhWMwejmidnPi9Clm/OHiU7ExAKwS6ql7qnhZS/3l8sdzm6Rs9ZQ1UO7scdfc 8MrB6wKNYQHPeoDLxmOa+DvSn64BPEboZtm2IoP+fvOvoJoffcM7FSxWTkkElrLO 6jgtRRm6Raw4vJvWmSJVIH8lpzthnOmdhtf+Ni9ZKysAPmj2N2uROdcjlqgOBvCf xagW4iSUXMLNa2W1IgcTOxeAQs+ASVm3AvG02kx1ImMlnWrLJQO2yOW7DYdd6sCJ x23XUpsiFeA= =5oVS -----END PGP SIGNATURE----- Merge tag 'omap-for-v5.0/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes SoC fixes for omaps for v5.0-rc cycle This series contains two SoC regression fixes and one uninitialized variable fix: - Fix inverted nirq pin handling for omap5 that started producing warnings with earlier GIC direction checks and took a while to understand and confirm. Basically there are two sys_nirq pins that are bypassing peripheral modules and inverted automatically by the SoC and need to be handled with a custom irq_set_type() - Recent ti-sysc changes caused a regression to the pwm-omap-dmtimer code where the device tree handling code for timer source clock gets confused. It looks like we can remove that code eventually, but for now we just drop a bogus pm_runtime_irq_safe() for the timers with the related quirks caused by pm_runtime_irq_safe(), and have the standard assigned-clocks and assigned-clock-parents deal with setting the source clock - Fix potentially uninitialized value for display init code if regmap_read() fails * tag 'omap-for-v5.0/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Variable "reg" in function omap4_dsi_mux_pads() could be uninitialized ARM: dts: Configure clock parent for pwm vibra bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe() ARM: OMAP5+: Fix inverted nirq pin interrupts with irq_set_type clocksource: timer-ti-dm: Fix pwm dmtimer usage of fck reparenting
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