i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO

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VI I2C controller has known hardware bug where immediate multiple
writes to TX_FIFO register gets stuck.

Recommended software work around is to read I2C register after
each write to TX_FIFO register to flush out the data.

This patch implements this work around for VI I2C controller.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>

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Sowjanya Komatineni 2021-01-12 11:02:41 -08:00 • committed by Wolfram Sang

parent bc1c2048ab

commit 2f3a0828d4

1 changed files with 21 additions and 1 deletions

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drivers/i2c/busses/i2c-tegra.c

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