cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()

Browse source

In cxl_dvsec_rr_decode() the pci driver expects to retrieve a cxlds,
struct cxl_dev_state, from the driver_data field of struct device.
While that works for Type 3, drivers for Type 1/2 devices may not
put a cxlds in the driver_data field.

In preparation for supporting Type 1/2 devices, replace parameter
'struct device' with 'struct cxl_dev_state' in cxl_dvsec_rr_decode().

Remove the unused parameter 'cxl_port' in cxl_dvsec_rr_decode().

Signed-off-by: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20241203162112.5088-1-alucerop@amd.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

...

This commit is contained in:

Alejandro Lucero 2024-12-03 16:21:12 +00:00 • committed by Dave Jiang

parent c8e88de1b4

commit 2f84d072bd

4 changed files with 9 additions and 8 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

6

drivers/cxl/core/pci.c

View file

3

drivers/cxl/cxl.h

View file

2

drivers/cxl/port.c

View file

6

tools/testing/cxl/test/mock.c

View file