A new PLL rate and missing mux on rk3568, a missing reset line on rk3588

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and removal of an unused field.
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Merge tag 'v6.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull some small Rockchip clk driver updates from Heiko Stuebner:

 - A new PLL rate and missing mux on rk3568
 - A missing reset line on rk3588
 - Removal of an unused field in struct rockchip_mmc_clock

* tag 'v6.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3568: Add PLL rate for 724 MHz
  clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
  clk: rockchip: rk3588: Add reset line for HDMI Receiver
  clk: rockchip: rk3568: Add missing USB480M_PHY mux
  dt-bindings: reset: Define reset id used for HDMI Receiver
  dt-bindings: clock: rockchip: add USB480M_PHY mux

...

This commit is contained in:

Stephen Boyd 2024-05-06 16:51:34 -07:00

parent 4cece76496 f513991b69

commit 2f8acf7837

5 changed files with 9 additions and 1 deletions

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1

drivers/clk/rockchip/clk-mmc-phase.c

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5

drivers/clk/rockchip/clk-rk3568.c

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1

drivers/clk/rockchip/rst-rk3588.c

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1

include/dt-bindings/clock/rk3568-cru.h

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2

include/dt-bindings/reset/rockchip,rk3588-cru.h

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