PCI: xilinx-nwl: Modify ECAM size to enable support for 256 buses

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The PCIe Root Port controller expects ECAM size to be set through software.

As such, update the value of the NWL_ECAM_VALUE_DEFAULT macro to 16 to
allow the controller to address the 256 MB ECAM region and, as such,
enable support for detecting up to 256 buses.

[kwilczynski: commit log]
Link: https://patchwork.kernel.org/project/linux-pci/patch/20231016051102.1180432-5-thippeswamy.havalige@amd.com/
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

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Thippeswamy Havalige 2023-10-16 10:41:02 +05:30 • committed by Krzysztof Wilczyński

parent 177692115f

commit 2fccd11518

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drivers/pci/controller/pcie-xilinx-nwl.c

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