drm/i915: make caching operate on all address spaces

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For now, objects will maintain the same cache levels amongst all address
spaces. This is to limit the risk of bugs, as playing with cacheability
in the different domains can be very error prone.

In the future, it may be optimal to allow setting domains per VMA (ie.
an object bound into an address space).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ben Widawsky 2013-07-31 17:00:03 -07:00 • committed by Daniel Vetter

parent 28d6a7bfa2

commit 3089c6f239

1 changed files with 12 additions and 8 deletions

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drivers/gpu/drm/i915/i915_gem.c

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