drm/amdgpu: enable mode1 reset

For sienna cichlid, add mode1 reset path for sGPU.

v2: hiding MP0/MP1 mode1 reset under AMD_RESET_METHOD_MODE1
v3: split emergency restart logic to a new patch

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wenhui Sheng 2020-07-13 15:15:11 +08:00 • committed by Alex Deucher
commit 311531f087
3 changed files with 14 additions and 9 deletions