phy: rockchip: samsung-hdptx: Reduce ROPLL loop bandwidth

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[ Upstream commit 8daaced9f5 ]

Due to its relatively low frequency, a noise stemming from the 24MHz PLL
reference clock may traverse the low-pass loop filter of ROPLL, which
could potentially generate some HDMI flash artifacts.

Reduce ROPLL loop bandwidth in an attempt to mitigate the problem.

Fixes: 553be2830c ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251028-phy-hdptx-fixes-v1-2-ecc642a59d94@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Cristian Ciocaltea 2025-10-28 10:00:55 +02:00 • committed by Greg Kroah-Hartman

parent 9f23c97c45

commit 3200ec35a0

1 changed files with 2 additions and 2 deletions

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drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

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