drm/amd/display: Add otg vertical interrupt0 support in DCN1.0

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[Why & How]
On DCN1.0, need otg vertical line interrupt to get appropriate timing
to achieve specific feature request.

Add otg vertical interrupt0 support for registers which operation is
vertical sensitive.

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Wayne Lin 2021-01-20 17:22:30 +08:00 • committed by Alex Deucher

parent 11f1a5538b

commit 320eca62fe

3 changed files with 54 additions and 0 deletions

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22

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

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31

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

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1

drivers/gpu/drm/amd/display/dc/irq_types.h

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