ixgbe: change vector numbering so that queues end up on correct CPUs

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This changes the numbering scheme slightly. Previously the ordering was
coming out like this:
Rx-2
Rx-1
Rx-0
TxRx-0
Which would drop two queues on CPU 0. This change makes it so that the
ordering is like this:
Rx-3
Rx-2
Rx-1
TxRx-0
This means that each CPU will have it's own Rx queue, and only CPU 0 will
have the Tx queue.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

...

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Alexander Duyck 2010-11-16 19:26:59 -08:00 • committed by Jeff Kirsher

parent b953799ee2

commit 32aa77a4fc

1 changed files with 4 additions and 2 deletions

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drivers/net/ixgbe/ixgbe_main.c

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