ARM: dts: dra7: Use clksel binding for CTRL_CORE_SMA_SW_0

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On dra76x, most dpll_gmac output clksel clocks are in registers from
CM_CLKSEL_DPLL_GMAC to CM_DIV_H13_DPLL_GMAC. In addition to that, there
are there more clocks in the CTRL_CORE_SMA_SW_0 register.

Let's group the CTRL_CORE_SMA_SW_0 clocks using the clksel binding to
reduce make W=1 dtbs unique_unit_address warnings, and stop using the
custom the ti,bit-shift property in favor of the standard reg property.

Let's also add a comment for the CTRL_CORE_SMA_SW_0 clock that matches the
documentation.

Signed-off-by: Tony Lindgren <tony@atomide.com>

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Tony Lindgren 2024-03-27 09:10:37 +02:00

parent bb5f690d5e

commit 32f4c19f6a

1 changed files with 36 additions and 27 deletions

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arch/arm/boot/dts/ti/omap/dra76x.dtsi

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