drm/xe: Use topology to determine page fault queue size

Browse source

Currently the page fault queue size is hard coded. However
the hardware supports faulting for each EU and each CS.
For some applications running on hardware with a large
number of EUs and CSs, this can result in an overflow of
the page fault queue.

Add a small calculation to determine the page fault queue
size based on the number of EUs and CSs in the platform as
detmined by fuses.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/24d582a3b48c97793b8b6a402f34b4b469471636.1723862633.git.stuart.summers@intel.com

...

This commit is contained in:

Stuart Summers 2024-08-17 02:47:31 +00:00 • committed by Matthew Brost

parent 7586fc52b1

commit 3338e4f90c

2 changed files with 49 additions and 14 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

54

drivers/gpu/drm/xe/xe_gt_pagefault.c

View file

9

drivers/gpu/drm/xe/xe_gt_types.h

View file