From 3366975818ebff2890d6f712c76acea3d0a81f3b Mon Sep 17 00:00:00 2001 From: Gabe Teeger Date: Thu, 3 Sep 2026 11:58:45 -0400 Subject: [PATCH] drm/amd/display: Remove MALL capabilities from DCN42B bounding box [Why] DCN42B has no MALL, but MALL capabilities are non-zero. [How] Zero out MALL capabilities in the dcn42b bounding box. Reviewed-by: Matthew Stewart Reviewed-by: Dillon Varone Signed-off-by: Gabe Teeger Signed-off-by: Chenyu Chen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- .../display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42b_soc_bb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42b_soc_bb.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42b_soc_bb.h index 0f8666788bbb..e83a9ac018db 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42b_soc_bb.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42b_soc_bb.h @@ -202,7 +202,7 @@ static const struct dml2_soc_bb dml2_socbb_dcn42b = { .xtalclk_mhz = 24, .pcie_refclk_mhz = 100, .dchub_refclk_mhz = 50, - .mall_allocated_for_dcn_mbytes = 64, + .mall_allocated_for_dcn_mbytes = 0, .max_outstanding_reqs = 256, .fabric_datapath_to_dcn_data_return_bytes = 32, .return_bus_width_bytes = 64,