arm64: dts: ti: k3-j721e-main: Add CSI2 interrupts property

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Add interrupts property for CSI2RX. Interrupt IDs are taken from the
J721E TRM [0].

Interrupt Line    | Source Interrupt
------------------|-------------------------
GIC500_SPI_IN_185 | CSI_RX_IF0_CSI_ERR_IRQ_0
GIC500_SPI_IN_184 | CSI_RX_IF0_CSI_IRQ_0
GIC500_SPI_IN_189 | CSI_RX_IF1_CSI_ERR_IRQ_0
GIC500_SPI_IN_188 | CSI_RX_IF1_CSI_IRQ_0

[0]: http://www.ti.com/lit/pdf/spruil1

Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20250808095804.544298-3-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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Yemike Abhilash Chandra 2025-08-08 15:27:59 +05:30 • committed by Nishanth Menon

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commit 33b34bfa4f

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arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

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