KVM: arm64: Don't zero the cycle count register when PMCR_EL0.P is set

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According to ARM DDI 0487G.a, page D13-3895, setting the PMCR_EL0.P bit to
1 has the following effect:

"Reset all event counters accessible in the current Exception level, not
including PMCCNTR_EL0, to zero."

Similar behaviour is described for AArch32 on page G8-7022. Make it so.

Fixes: c01d6a1802 ("KVM: arm64: pmu: Only handle supported event counters")
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210618105139.83795-1-alexandru.elisei@arm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Alexandru Elisei 2021-06-18 11:51:39 +01:00 • committed by Greg Kroah-Hartman

parent 50cd74c7f3

commit 33e8f03d59

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arch/arm64/kvm/pmu-emul.c

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