clk: meson8b: fix clk81 register address

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During meson8b clock probe, clk81 register address is fixed twice.
First using the meson8b_clk_gates array, then by directly changing
meson8b_clk81 register.

As a result meson8b_clk81.reg = HHI_MPEG_CLK_CNTL + clk_base + clk_base.

Fixed by just removing the second fixup.

Fixes: e31a1900c1 ("meson: clk: Add support for clock gates")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

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Jerome Brunet 2017-01-25 11:53:06 +01:00 • committed by Stephen Boyd

parent 88c9b70bb2

commit 340a84ce1e

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drivers/clk/meson/meson8b.c

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