arm64: dts: qcom: sm8550: add PCIe MHI register regions

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Add the MHI register regions to the pcie0 and pcie1 controller nodes
to expose link power state transition counters (L0s/L1/L1.1/L1.2/L2)
via debugfs. The PCIe host driver uses this region to read the
link_transition_count from the MHI registers.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Joe Sandom <jsandom@axon.com>
Link: https://lore.kernel.org/r/20260420-rb5gen2-dts-v4-1-b461909c2de8@axon.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Joe Sandom 2026-04-20 10:13:13 +01:00 • committed by Bjorn Andersson

parent 4c53f51b44

commit 3473183259

1 changed files with 16 additions and 4 deletions

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arch/arm64/boot/dts/qcom/sm8550.dtsi

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