drm/i915/dg2: DG2 has fixed memory bandwidth

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DG2 doesn't have a SAGV or QGV points that determine memory bandwidth.
Instead it has a constant amount of memory bandwidth available to
display that does not need to be reduced based on the number of active
planes.

For simplicity, we'll just modify driver initialization to create a
single dummy QGV point with the proper amount of memory bandwidth,
rather than trying to query the pcode for this information.

Bspec: 64631
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-19-matthew.d.roper@intel.com

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Matt Roper 2021-07-21 15:30:43 -07:00

parent 5eb6bf0b44

commit 34ba3c8a7d

1 changed files with 23 additions and 1 deletions

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drivers/gpu/drm/i915/display/intel_bw.c

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