phy: cadence-torrent: Add PCIe multilink + USB with same SSC register config for 100 MHz refclk

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Add register sequences and support for PCIe multilink + USB configuration
for 100MHz reference clock. The same SSC is used for both PCIe and USB.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Co-developed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20250616064705.3225758-3-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

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Swapnil Jakhade 2025-06-16 12:17:05 +05:30 • committed by Vinod Koul

parent 240ef19ad7

commit 351e07e6b2

1 changed files with 150 additions and 8 deletions

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drivers/phy/cadence/phy-cadence-torrent.c

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