mmc: tegra: Write xfer_mode, CMD regs in together

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If there is a gap between xfer mode and command register writes,
tegra SDMMC controller can sometimes issue a spurious command before
the CMD register is written. To avoid this, these two registers need
to be written together in a single write operation.

This is implemented as an NVQUIRK as it applies to T114, T124 and
T132.

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

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Pavan Kunapuli 2015-01-28 11:45:16 -05:00 • committed by Ulf Hansson

parent 0501be6429

commit 352ee868dd

1 changed files with 29 additions and 1 deletions

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drivers/mmc/host/sdhci-tegra.c

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