clk: renesas: rzg2l-cpg: Refactor to use priv for clks and base in clock register functions

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Simplify the `rzg2l-cpg` driver by removing explicit passing of `clks` and
`base` parameters in various clock registration functions. These values
are now accessed directly from the `priv` structure.

While at it, drop masking of parent clocks with 0xffff as nothing is ever
stored in the high bits.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240715103555.507767-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Lad Prabhakar 2024-07-15 11:35:55 +01:00 • committed by Geert Uytterhoeven

parent 019b5ecc03

commit 354e5cf4f6

1 changed files with 17 additions and 28 deletions

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drivers/clk/renesas/rzg2l-cpg.c

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