spi/fsl-espi: make the clock computation easier to read

Browse source

The -1 +1 thingy should probably do what DIV_ROUND_UP does. The 4 is 2
the  "platform_clock => sysclock" and 2 from the computation part. The 64
is the same 4 times 16.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

...

This commit is contained in:

Sebastian Andrzej Siewior 2012-03-15 18:42:31 +01:00 • committed by Grant Likely

parent bb9c5687e8

commit 35faa55cff

1 changed files with 2 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

4

drivers/spi/spi-fsl-espi.c

View file