powerpc/powernv: Reserve the correct PE number

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We're assigning PE numbers after the completion of PCI probe. During
the PCI probe, we had PE#0 as the super container to encompass all
PCI devices. However, that's inappropriate since PELTM has ascending
order of priority on search on P7IOC. So we need PE#127 takes the
role that PE#0 has previously. For PHB3, we still have PE#0 as the
reserved PE.

The patch supposes that the underly firmware has built the RID to
PE# mapping after resetting IODA tables: all PELTM entries except
last one has invalid mapping on P7IOC, but all RTEs have binding
to PE#0. The reserved PE# is being exported by firmware by device
tree.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

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This commit is contained in:

Gavin Shan 2013-11-04 16:32:47 +08:00 • committed by Benjamin Herrenschmidt

parent 631ad691b5

commit 36954dc78d

3 changed files with 17 additions and 16 deletions

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22

arch/powerpc/platforms/powernv/pci-ioda.c

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10

arch/powerpc/platforms/powernv/pci.c

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1

arch/powerpc/platforms/powernv/pci.h

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