drm/msm/dpu: split interrupt address arrays

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There is no point in having a single enum (and a single array) for both
DPU < 7.0 and DPU >= 7.0 interrupt registers. Instead define a single
enum and two IRQ address arrays.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Fixes: c731461322 ("drm/msm: Add missing struct identifier")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549653/
Link: https://lore.kernel.org/r/20230727144543.1483630-3-dmitry.baryshkov@linaro.org

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Dmitry Baryshkov 2023-07-27 17:45:40 +03:00

parent c54b4c3519

commit 370891f0d9

2 changed files with 72 additions and 38 deletions

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82

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

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28

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h

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