clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change

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This patch utilizes the new PLL clk notifier to gate then ungate the
PLL CPU clock after rate changes. This should mitigate the system
hangs observed after the introduction of cpufreq for the A33.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Chen-Yu Tsai 2017-04-13 10:13:53 +08:00 • committed by Maxime Ripard

parent 02ae2bc6fe

commit 372fa10172

1 changed files with 11 additions and 0 deletions

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drivers/clk/sunxi-ng/ccu-sun8i-a33.c

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