drm/amd/display: Increase minimum clock for TMDS 420 with pipe splitting

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[ Upstream commit 002a612023 ]

[Why]
-Pipe splitting allows for clocks to be reduced, but when using TMDS 420,
reduced clocks lead to missed clocks cycles on clock resyncing

[How]
-Impose a minimum clock when using TMDS 420

Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Relja Vojvodic <rvojvodi@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

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Relja Vojvodic 2025-08-14 11:33:22 -04:00 • committed by Greg Kroah-Hartman

parent f712d871ab

commit 3796a7feb1

1 changed files with 19 additions and 9 deletions

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drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

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