x86/sev: Prevent GUEST_TSC_FREQ MSR interception for Secure TSC enabled guests

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The hypervisor should not be intercepting GUEST_TSC_FREQ MSR(0xcOO10134)
when Secure TSC is enabled. A #VC exception will be generated otherwise. If
this should occur and Secure TSC is enabled, terminate guest execution.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/20250106124633.1418972-8-nikunj@amd.com

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Nikunj A Dadhania 2025-01-06 18:16:27 +05:30 • committed by Borislav Petkov (AMD)

parent 0f0502b886

commit 38cc6495cd

2 changed files with 10 additions and 1 deletions

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10

arch/x86/coco/sev/core.c

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1

arch/x86/include/asm/msr-index.h

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