clk: tegra: Initialize DSI low-power clocks

Browse source

The low-power DSI clocks are used during host-driven transactions on the
DSI bus. Documentation recommends that they be children of PLLP and run
at a frequency of at least 52 MHz.

Signed-off-by: Thierry Reding <treding@nvidia.com>

...

This commit is contained in:

Thierry Reding 2013-11-18 16:11:36 +01:00 • committed by Peter De Schrijver

parent 5ab5d4048e

commit 39409aa424

1 changed files with 2 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

2

drivers/clk/tegra/clk-tegra114.c

View file