drm/i915/ltphy: Program sequence for PORT_CLOCK_CTL for LT Phy

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Program sequence from port clock ctl except for the SSC
enablement part which will be taken care of later.

Bspec: 74492
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-6-suraj.kandpal@intel.com

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Suraj Kandpal 2025-11-01 08:54:53 +05:30

parent 809adb87da

commit 3a323c7e96

2 changed files with 38 additions and 0 deletions

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1

drivers/gpu/drm/i915/display/intel_cx0_phy.h

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37

drivers/gpu/drm/i915/display/intel_lt_phy.c

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