clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT

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Add clock and reset entries for Generic Timer (GTM), I2C Bus Interface
(RIIC), SD/MMC Host Interface (SDHI) and Watchdog Timer (WDT) IP blocks.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828093822.162855-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Lad Prabhakar 2024-08-28 10:38:22 +01:00 • committed by Geert Uytterhoeven

parent bc4d25fdfa

commit 3aeccbe081

2 changed files with 88 additions and 0 deletions

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84

drivers/clk/renesas/r9a09g057-cpg.c

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4

drivers/clk/renesas/rzv2h-cpg.h

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