scsi: hisi_sas: Add v2 hw support for different refclk

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The hip06 D03 and hip07 D05 boards have different reference clock
frequencies for the SAS controller.

Register PHY_CTRL needs to be programmed differently according to this
frequency, so add support for this.

The default register setting in PHY_CTRL is for 50MHz, so only update
this register when the refclk frequency is 66MHz.

For ACPI we expect the _RST handler to set the correct value for
PHY_CTRL (we're forced to take different approach for DT and ACPI as
ACPI does not support fixed-clock device).

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

...

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John Garry 2016-10-04 19:11:11 +08:00 • committed by Martin K. Petersen

parent 039ae102a8

commit 3bc45af81d

3 changed files with 12 additions and 1 deletions

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2

drivers/scsi/hisi_sas/hisi_sas.h

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7

drivers/scsi/hisi_sas/hisi_sas_main.c

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4

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

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