clk: renesas: r9a09g047: Add WDT clocks and resets

WDT0 reset is for CM33.  Add WDT[1-3] clock and reset entries.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115103858.104709-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2025-01-15 10:38:51 +00:00 • committed by Geert Uytterhoeven
commit 3c437d906f