serial: 8250_mid: use proper bar for DNV platform

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commit 107e15fc1f upstream.

Unlike Intel Medfield and Tangier platforms DNV uses PCI BAR0 for IO compatible
resources and BAR1 for MMIO. We need latter in a way to support DMA. Introduce
an additional field in the internal structure and pass PCI BAR based on device
ID.

Reported-by: "Lai, Poey Seng" <poey.seng.lai@intel.com>
Fixes: 6ede6dcd87 ("serial: 8250_mid: add support for DMA engine handling from UART MMIO")
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Andy Shevchenko 2016-04-04 17:35:09 +03:00 • committed by Greg Kroah-Hartman

parent 1401ebda89

commit 3c5dafe43d

1 changed files with 11 additions and 3 deletions

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drivers/tty/serial/8250/8250_mid.c

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